But How Do It Know? - the Basic Principles of Computers for Everyone by J Clark Scott Page B
Authors: J Clark Scott
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does. After that, we will see exactly how it is built. If you happen to trust your author enough to believe that such a stepper can be built out of gates, and you’re in such a hurry that you want to skip the ‘how it is built’ part of the chapter, you might still understand the computer.
Here is a complete stepper.
It has two inputs. One is called ‘clk,’ because this is where we connect a bit that is going on and off, such as our original clock bit. The other input is called ‘reset,’ which is used to return the stepper back to step one. For outputs, it has a number of bits, each of which will come on for one complete clock cycle, and then turn off, one after the other. The output labeled ‘Step 1’ turns on for one clock cycle, then ‘Step 2’ for the next clock cycle, etc. A stepper can be built to have as many steps as needed for any particular task you want to do. In the case of this computer that we are building, seven steps are sufficient. When the last step (7) turns on, it stays on, and the stepper doesn’t do anything else until the reset bit is turned on briefly, at which time the steps start over again beginning with ‘Step 1.’
Here is a graph of the input ‘clk’ bit, and the outputs of a seven-step stepper.
Here is how the stepper is built. It is done using some of the same memory bits that we used to make registers, but they are arranged very differently. We are not going to store anything in these bits, we are going to use them to create a series of steps.
The stepper consists of several memory bits connected in a string, with the output of one connected to the input of the next. Here is a diagram that shows most of the stepper:
First look at the series of ‘M’ memory bits just like the ones that we used earlier in the book. In this picture, there are twelve of them connected together, with the output of one connected to the input of the next, all the way down the line. The input to the first bit on the left is connected to a place where the electricity is always on, so when the set bit of that ‘M’ comes on, that ‘M’ will receive that on state, and pass it through to its output.
If you look at the set bits of these ‘M’s, you will see that the set bits of the even numbered ‘M’s are connected to clk, and the set bits of the odd numbered ‘M’s are connected to the same clock after it goes through a NOT gate. This new bit that is made by passing clk through a NOT gate can be called ‘not clk,’ and we can show both on this graph:
So what will happen with this bunch of gates? If you assume that all of the ‘M’s start in the off state, and then start ‘clk’ “ticking,” here is what it will do.
The first time ‘clk’ comes on, nothing will happen, because the set bit of the first ‘M’ is connected to ‘not clk,’ which is off when ‘clk’ is on. When ‘clk’ goes off, ‘not clk’ turns on, and the first ‘M’ will come on, but nothing will happen at the second ‘M’ because its ‘set’ bit is connected to ‘clk,’ which is now off. When ‘clk’ comes back on, the second ‘M’ will now come on. As the clock ticks, the ‘on’ that enters the first memory bit will step down the line, one bit for each time the clock goes on, and one bit for each time the clock goes off. Thus two bits come on for each clock cycle.
Now, turning to the full stepper diagram below, step 1 comes from a NOT gate connected to the output of the second ‘M.’ Since all ‘M’s start off, step 1 will be on until the second ‘M’ comes on, at which time step 1 will be over. For the remaining steps, each one will last from the time its left side ‘M’ turns on until the time its right side ‘M’ turns on. The AND gates for steps 2-6 have both inputs on when the left ‘M’ is on, and the right ‘M’ is off. If we connect the output of one ‘M’ and the NOT of the output of an ‘M’ two spaces farther on to an AND gate, its output will be on
Here is a complete stepper.
It has two inputs. One is called ‘clk,’ because this is where we connect a bit that is going on and off, such as our original clock bit. The other input is called ‘reset,’ which is used to return the stepper back to step one. For outputs, it has a number of bits, each of which will come on for one complete clock cycle, and then turn off, one after the other. The output labeled ‘Step 1’ turns on for one clock cycle, then ‘Step 2’ for the next clock cycle, etc. A stepper can be built to have as many steps as needed for any particular task you want to do. In the case of this computer that we are building, seven steps are sufficient. When the last step (7) turns on, it stays on, and the stepper doesn’t do anything else until the reset bit is turned on briefly, at which time the steps start over again beginning with ‘Step 1.’
Here is a graph of the input ‘clk’ bit, and the outputs of a seven-step stepper.
Here is how the stepper is built. It is done using some of the same memory bits that we used to make registers, but they are arranged very differently. We are not going to store anything in these bits, we are going to use them to create a series of steps.
The stepper consists of several memory bits connected in a string, with the output of one connected to the input of the next. Here is a diagram that shows most of the stepper:
First look at the series of ‘M’ memory bits just like the ones that we used earlier in the book. In this picture, there are twelve of them connected together, with the output of one connected to the input of the next, all the way down the line. The input to the first bit on the left is connected to a place where the electricity is always on, so when the set bit of that ‘M’ comes on, that ‘M’ will receive that on state, and pass it through to its output.
If you look at the set bits of these ‘M’s, you will see that the set bits of the even numbered ‘M’s are connected to clk, and the set bits of the odd numbered ‘M’s are connected to the same clock after it goes through a NOT gate. This new bit that is made by passing clk through a NOT gate can be called ‘not clk,’ and we can show both on this graph:
So what will happen with this bunch of gates? If you assume that all of the ‘M’s start in the off state, and then start ‘clk’ “ticking,” here is what it will do.
The first time ‘clk’ comes on, nothing will happen, because the set bit of the first ‘M’ is connected to ‘not clk,’ which is off when ‘clk’ is on. When ‘clk’ goes off, ‘not clk’ turns on, and the first ‘M’ will come on, but nothing will happen at the second ‘M’ because its ‘set’ bit is connected to ‘clk,’ which is now off. When ‘clk’ comes back on, the second ‘M’ will now come on. As the clock ticks, the ‘on’ that enters the first memory bit will step down the line, one bit for each time the clock goes on, and one bit for each time the clock goes off. Thus two bits come on for each clock cycle.
Now, turning to the full stepper diagram below, step 1 comes from a NOT gate connected to the output of the second ‘M.’ Since all ‘M’s start off, step 1 will be on until the second ‘M’ comes on, at which time step 1 will be over. For the remaining steps, each one will last from the time its left side ‘M’ turns on until the time its right side ‘M’ turns on. The AND gates for steps 2-6 have both inputs on when the left ‘M’ is on, and the right ‘M’ is off. If we connect the output of one ‘M’ and the NOT of the output of an ‘M’ two spaces farther on to an AND gate, its output will be on
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